authors

	Keynote 1: Security and Ubiquity Opportunities for Application-Specific Processors, Ruby B. Lee (Princeton University)
	Abstract Application-specific processors have been designed for improving the performance of a given important application or class of applications. They have also enabled improvements in power consumption, cost, size and efficiency. With the escalating number of attacks on computing, communications and entertainment devices, the issue of security is now of paramount importance. How can application-specific instruction processors (ASIPs) be designed to significantly improve applications security? Can the hardware provide fundamental security enablers for an application, beyond cryptographic acceleration? At the same time, is there a way to make ASIPs more ubiquitous? Can insights gained from application-driven design be generalized? This talk will discuss some of the opportunities for application-specific processor architectures to innovate and lead the way in building security features into processors. It will also discuss how ASIP designs can be “generalized”, leading to more ubiquitous deployment of novel and efficient processing techniques gleaned from application-driven designs. Speaker’s Bio Ruby B. Lee is the Forrest G. Hamrick Professor of Engineering and Professor of Electrical Engineering at Princeton University, with an affiliated appointment in the Computer Science Department. She is the director of the Princeton Architecture Laboratory for Multimedia and Security (PALMS). Her current research is in designing security-aware processors, memories and systems, protecting critical information, and designing innovative instruction-set architecture for emerging computing paradigms. She is a Fellow of the ACM, Fellow of the IEEE and Associate Editor-in-Chief of IEEE Micro. Prior to joining the Princeton faculty in 1998, Dr. Lee served as chief architect at Hewlett-Packard, responsible at different times for processor architecture, multimedia architecture and security architecture. She was a key architect of the PA-RISC architecture used for HP workstations and servers. She pioneered adding multimedia instructions to microprocessors, facilitating ubiquitous and pervasive multimedia. She co-led an Intel-HP architecture team designing new ISA for multimedia and data parallelism for 64-bit Intel microprocessors. Simultaneous with her full-time HP tenure, she was also Consulting Professor of Electrical Engineering at Stanford University. She has a Ph.D. in Electrical Engineering and a M.S. in Computer Science, both from Stanford University, and an A.B. with distinction from Cornell University, where she was a College Scholar. She has been granted over 120 United States and international patents, and has authored numerous conference and journal papers on computer architecture, processor design, multimedia and security topics.
	Keynote 2: The Art of Application-Specific Processor Design: Great Artists use Good Tools, Gert Goossens (Target Compiler Technologies)
	Abstract Application-Specific Processors (ASIPs) are clearly becoming accepted as key building blocks of multi-core systems-on-chip that power today's electronic systems. In this presentation, we will review methodologies for the design of ASIPs. We believe that retargetable software tools are an absolute prerequisite for contemporary ASIP design. A central element of such a tool flow is a retargetable C compiler that drives the architectural exploration process. Retargetable software tools introduce formalism and correctness, eliminate guess work, and extend the designer's capabilities beyond the architectural limitations of configurable processor templates as offered by intellectual property vendors. They enable the creation of differentiating intellectual property, fully supported by C-based software development tools and automatically generated RTL hardware implementations. Speaker’s Bio Gert Goossens is the CEO and a co-founder of Target Compiler Technologies, a provider of retargetable tools for the design of application-specific processors. Before founding Target in 1996, Gert Goossens was affiliated with the IMEC research centre, where he headed research groups on behavioural synthesis and software compilation. Gert Goossens holds several patents in the area of processor modelling and design, and has authored or co-authored around 40 papers in electronic design automation. He received a masters and a Ph.D. degree in electrical engineering from K.U. Leuven, in 1984 and 1989 respectively.

Keynote 1: Security and Ubiquity Opportunities for Application-Specific Processors,
Ruby B. Lee (Princeton University)

Abstract

Application-specific processors have been designed for improving the performance of a given important application or class of applications. They have also enabled improvements in power consumption, cost, size and efficiency. With the escalating number of attacks on computing, communications and entertainment devices, the issue of security is now of paramount importance. How can application-specific instruction processors (ASIPs) be designed to significantly improve applications security? Can the hardware provide fundamental security enablers for an application, beyond cryptographic acceleration? At the same time, is there a way to make ASIPs more ubiquitous? Can insights gained from application-driven design be generalized? This talk will discuss some of the opportunities for application-specific processor architectures to innovate and lead the way in building security features into processors. It will also discuss how ASIP designs can be “generalized”, leading to more ubiquitous deployment of novel and efficient processing techniques gleaned from application-driven designs.

Speaker’s Bio

Ruby B. Lee is the Forrest G. Hamrick Professor of Engineering and Professor of Electrical Engineering at Princeton University, with an affiliated appointment in the Computer Science Department. She is the director of the Princeton Architecture Laboratory for Multimedia and Security (PALMS). Her current research is in designing security-aware processors, memories and systems, protecting critical information, and designing innovative instruction-set architecture for emerging computing paradigms. She is a Fellow of the ACM, Fellow of the IEEE and Associate Editor-in-Chief of IEEE Micro.

Prior to joining the Princeton faculty in 1998, Dr. Lee served as chief architect at Hewlett-Packard, responsible at different times for processor architecture, multimedia architecture and security architecture. She was a key architect of the PA-RISC architecture used for HP workstations and servers. She pioneered adding multimedia instructions to microprocessors, facilitating ubiquitous and pervasive multimedia. She co-led an Intel-HP architecture team designing new ISA for multimedia and data parallelism for 64-bit Intel microprocessors. Simultaneous with her full-time HP tenure, she was also Consulting Professor of Electrical Engineering at Stanford University. She has a Ph.D. in Electrical Engineering and a M.S. in Computer Science, both from Stanford University, and an A.B. with distinction from Cornell University, where she was a College Scholar. She has been granted over 120 United States and international patents, and has authored numerous conference and journal papers on computer architecture, processor design, multimedia and security topics.

Keynote 2: The Art of Application-Specific Processor Design: Great Artists use Good Tools,
Gert Goossens (Target Compiler Technologies)

Abstract

Application-Specific Processors (ASIPs) are clearly becoming accepted as key building blocks of multi-core systems-on-chip that power today's electronic systems. In this presentation, we will review methodologies for the design of ASIPs.

We believe that retargetable software tools are an absolute prerequisite for contemporary ASIP design. A central element of such a tool flow is a retargetable C compiler that drives the architectural exploration process.

Retargetable software tools introduce formalism and correctness, eliminate guess work, and extend the designer's capabilities beyond the architectural limitations of configurable processor templates as offered by intellectual property vendors. They enable the creation of differentiating intellectual property, fully supported by C-based software development tools and automatically generated RTL hardware implementations.

Speaker’s Bio

Gert Goossens is the CEO and a co-founder of Target Compiler Technologies, a provider of retargetable tools for the design of application-specific processors. Before founding Target in 1996, Gert Goossens was affiliated with the IMEC research centre, where he headed research groups on behavioural synthesis and software compilation. Gert Goossens holds several patents in the area of processor modelling and design, and has authored or co-authored around 40 papers in electronic design automation. He received a masters and a Ph.D. degree in electrical engineering from K.U. Leuven, in 1984 and 1989 respectively.